FET Fixed Bias Amplifier

An FET Fixed Bias Amplifier is a simple amplifier circuit with four resistors and a single Field Effect Transistor and two supply voltages (VDD and VGG). Its schematic, with the resistors labeled, is shown below. The transistor has two constants associated with it, VP and IDSS, with an optional third, rd.

This program should calculate the relevant DC and AC parameters of the circuit according to the formulas shown below.

One function which has general use is the parallel resistor function. This function takes two values (R1 and R2) and returns a value (RP = R1*R2/(R1+R2)). I will indicate this in the formulas with the notation Parallel(R1,R2). You may implement this as part of the formula or as a Basic function, as you wish.

DC Values  
ID (The drain current) = IDSS*(1 -(VGG)/(VP))*(1 -(VGG)(VP))
VD (The drain voltage) = VDD - ID*RD
VS (The source voltage) = 0 (tied to ground)
VG (The gate voltage) = VGG
VDS = VD-VS

AC Values  
gm (The transconductance = (2*IDSS/(-VP))(1-(VGS/VP))
Av (The voltage gain) = -gm*Zo
Zi (The input impedance) = RG
Zo (The output impedance) = Parallel(rd,RD)